An electronic camera generally converts an optical image into a set of electronic signals. The electronic signals may represent intensities of colors of light received by the camera. The electronic camera typically includes an array of image sensors or light sensitive sensors which detect the intensity of light received by the camera. The image sensors typically generate electronic signals that have amplitudes that are proportionate to the intensity of the light received by the sensors. The electronic signals can be conditioned and sampled to allow image processing.
Integration of the image sensors with signal processing circuitry is becoming more important because integration enables miniaturization and improvement of imaging systems. Integration of image sensors along with analog and digital signal processing circuitry allows electronic camera systems to be low cost, compact and require low power.
Historically, image sensors have predominantly been charged coupled devices (CCDs). CCDs are relatively small and can provide a high-fill factor. However, CCDs are very difficult to integrate with digital and analog circuitry. Further, CCDs dissipate a large amount of power and suffer from image smearing problems.
Historically, CCDs have been the light sensitive pixel cells typically used in solid state visible light imaging device applications. However, CMOS active pixel sensors which include photo-gate or photo-diode structures with signal amplification circuits within a light sensitive pixel cell, offer several advantages over CCDs. CMOS active pixel sensors dissipate less power, can be manufactured less expensively, require lower power supply voltages and are easier to integrate into large scale integrated circuits than CCDs. Additionally, CMOS active pixel sensors can be manufactured in low cost, high volume application specific integrated circuits (ASICs) CMOS processes. Therefore, ASIC manufacturers can develop light sensitive pixel cells. ASIC manufacturers can further reduce manufacturing costs and provide additional performance benefits as CMOS technology advances.
FIG. 1 shows a prior art light sensitive pixel cell 2 and a corresponding read-out channel 4. The read-out channel 4 includes a light image signal output VS and a reference output VR.
The pixel cell 2 generates an output signal having an amplitude which is proportionate to the intensity of light being received by the pixel cell 2. The output signal, however, also includes a fixed pattern of noise. The fixed pattern of noise reduces the correspondence between the intensity of light received by the pixel cell and the resulting amplitude of the output signal. Further, the fixed pattern of noise varies between different pixel cells because of process, temperature and biasing variations.
The pixel cell 2 includes a photo-diode D1, a reset transistor Q1 and output transistors Q2, Q3. The fixed pattern noise of the pixel cell 2 generally consists of dark current noise and shot noise of the photo-diode D1, reset and clock noise of the reset transistor Q1, and gain variation of the output transistor Q2. As was previously mentioned, the fixed pattern of noise varies between different pixel cells because of process, temperature and differences in biasing conditions between pixel cells.
An electronic image is captured by sampling the charge accumulated by each of the light sensitive pixel cells of an array of light sensitive pixel cells. The amount of charge accumulated by each light sensitive pixel cell is proportional to the intensity of the light received by the light sensitive portion of the light sensitive pixel cell. The fixed patten noise of the light sensitive pixel cells reduces the correlation between the sampled value of the charge conducted by the light sensitive pixel cells and the intensity of the light received by the light sensitive pixel cells.
A reference response for the fixed pattern noise of the pixel cell 2 can be determined by sampling the response of pixel cell 2 while the pixel cell 2 is not exposed to any light. Errors in a captured electronic image due to the fixed pattern noise of an array of pixel cells 2 can be eliminated by subtracting the reference response from the captured image. This process, called correlated double sampling, is accomplished by the prior art light sensitive pixel cell 2 and the corresponding read-out channel 4 by sampling the light image signal output VS generating a signal response, and sampling the reference output VR generating a reference response. Therefore, two samples are required for each pixel cell 2 of an array of pixel cells to eliminate the fixed pattern noise effects within a sampled electronic image. For large arrays, a large number of electronic samples are required to construct an image.
The read-out channel 4 includes signal amplification circuitry 6 and reference amplification circuitry 8. Both the signal amplification circuitry 6 and the reference amplification circuitry 8 include offset errors. The offset errors reduce the correspondence between the pixel cell 2 response and the sampled electronic image. The offset errors can be estimated by driving the inputs to the signal amplification circuitry and the reference amplification circuitry to a predetermined voltage potential and sampling the voltage potential of the signal output VS and a reference output VR generating sampled offset voltages. The offset errors can be eliminated from a captured image by subtracting the sampled offset voltages from the signal response and the reference response. However, this requires four samples for each pixel within an array of pixels to capture an electronic response.
Each pixel cell 2 within an array of pixel cells includes a read-out channel 4 having a light image signal output VS and a reference output VR. The signal output VS and a reference output VR of many read-out channels are connected to a conductive line typically called a "bitline." Generally, many outputs will be connected to a single bitline. The bitlines capacitively load the signal output VS and the reference output VR. The capacitive loading increases the settling time required for the signal output VS and the reference output VR to drive the bitlines to a voltage potential which represents the signal voltage or the reference voltage of the pixel cell 2. The settling time is also dependent on the current driving ability of the read-out channel. The read-out channel 4 shown in FIG. 1 offers limited current drive. Therefore, sampling the output of the prior art read-out channel 4 can require excessive settling time as capacitance associated with a bitline is charged.
The read-out channel 4 shown in FIG. 1 provides a gain factor between the pixel cell 2 output signal and the signal output VS of between about .5 to .9. Therefore, the output signal of the pixel cell 2 is greatly attenuated before being sampled at the output of the read-out channel 4. The attenuation reduces the signal to noise ratio of pixel cell 2 output signal.
It is desirable to have an active pixel sensor read-out channel which eliminates the fixed pattern noise associated with an electronically sampled image created by sampling the response of an array of CMOS pixel cells. Ideally, the active pixel sensor read-out channel would minimize the number of samples required to capture the electronically sampled image. Further, the active pixel sensor read-out channel would be operable with an array of light pixel cell fabricated using standard CMOS processes. It is desirable to have the active pixel sensor read-out channel provide greater current drive than present read-out channels to improve the settling time of a channel output connected to a capacitive bitline. It is further desirable to have the gain factor of the active pixel sensor be greater than one.